Intel Core i9-12900K and Core i5-12600K Review

👤by David Mitchelson Comments 📅04-11-21
Platform Features PT1

INTEL 7 PROCESS

AMD have enjoyed a lithographic process lead for the last couple of desktop CPU generations thanks to TSMC’s 7nm technology, but Intel are finally fighting back. ‘Intel 7’, AKA the Intel 10nm Enhanced SuperFin Process, was renamed to draw parallels with TSMC’s 7nm tech as similar sized physical structures are prevalent on both.

As an matured process, Intel 7 boasts 10-15% perf/watt over the previous generation as well as more dense packing of transistors. NVIDIA have also needed to improve sustained operating frequencies to reach the required levels of performance for desktop, which the listed specifications indicate they have achieved.

Alder Lake CPUs are the first 10nm CPU series they’ve released in this segment. The die present on the three CPUs available is slightly smaller than the 14nm Rocket Lake processors released earlier this year, despite the larger package footprint.

LGA 1700 SOCKET

With a larger package comes a new socket. LGA1700 processors are incompatible with previous Intel platforms, and motherboards with the socket have a different set of CPU cooler mounting points than LGA1200 and earlier. Fret not however, coolers are now shipping with LGA 1700 mounting kits and many premium manufacturers are offering free upgrade kits for suitable coolers already in the hands of consumers.

While the package footprint is larger, the processor die is actually thinner than its Rocket Lake equivalent. Solder TIM and an IHS with identical thickness to the predecessor generation should mean better thermal characteristics and faster conduction of heat away from the die. And that’s going to be essential given that the processors are rated for up-to 241W of continuous power draw.


P-CORES AND E-CORES

The Alder Lake architecture arrives with two major new building-blocks for Intel’s CPUs: the Performance Core, and the Efficiency Core. They’re a blend of techniques applied to their high-power desktop line and low-power desktop and mobile CPUs, integrated onto the same CPU core, with the aim of greatly improving both characteristics in a scalable manner.

The performance cores have been dubbed P-Cores and are based on Intel’s Golden Cove core architecture. They’re large elements on the chip roughly analogous to Rocket Lake’s Cypress Cove cores that support Hyperthreading. Each is however meatier - they incorporate 1.25MB of L2 Cache each, up from 512KB on Rocket Lake cores, and incorporate further improvements to the pipeline.

P-Cores are workhorse cores for lightly threaded workloads operating at high frequencies. You may have seen headline figures of an ~19% IPC improvement averaged across workload cases compared with Rocket Lake, and it’s operations with this core that the figure refers to.

Efficiency cores meanwhile have been dubbed E-Cores, and they’re based on the new Gracemont core architecture that’s comparable to the highly efficient Intel Atom core architectures of the past. They’re physically smaller than the P-Cores, don’t support Hyperthreading, and on an Alder Lake CPU they’re arranged in clusters of four. Each cluster of four is equipped with 2MB of shared L2 Cache, making the cluster overall remarkably well suited to multi-threaded operation. Their design also makes them ideal for background tasks, and off-loading tasks from the P-Cores when the CPU encounters heavy load.

An example given by Intel where E-Cores might be leveraged alongside P-Cores is when playing a demanding game while also streaming it. The key game threads would be processed by the P-Cores, while less demanding activities including background tasks and OBS would be assigned to the E-Cores. Compared to an 8-Core Rocket Lake CPU, Intel estimate that in-game performance in such a scenario would be up to 87% faster with the flagship Alder Lake CPU.

A not insignificant part of Windows 11 development was making the Windows Scheduler aware of this new hybrid core architecture. In operation it will be aided by the new Intel Thread Manager, which provides recommendations to the Scheduler of where to assign threads based on criteria such as core load, power overhead etc at runtime.

Base frequencies of both P-Cores and E-Cores increase down the series, taking advantage of the TDP headroom afforded by fewer cores overall. Boost Frequencies are lower however, maintaining the overall performance advantage across workloads as we go up the SKUs. When overclocking both P-Cores and E-Cores can be adjusted independently through separate ratios, providing yet another tier of tinkering to enthusiasts.

The Core i9-12900K is equipped with 8 P-Cores and 8 E-Cores, supporting a total of 24 independent threads. The Core i5-12600K incorporates 6 P-Cores and 4 E-Cores for 16 independent threads. Lower tier SKUs may have fewer - or even none - of any particular core, but that’s beyond the scope of this launch.

L3 CACHE

Significant portions of the CPU die given over to increased cache pools compared to the prior generation. We’ve already noted the L2 cache arrangements of the P-Cores and E-Cores, but should also mention the sizeable shared L3 Cache serving as a Last Level Cache for the processor cores.

The processor family features up to 30MB of L3 (Smartcache), a huge increase over the 16MB for Rocket Lake’s flagship i9-11900K. This cache is accessible by each P-Core and E-Core cluster, and thus should greatly improve all aspects of performance so long as the queue isn’t clogged by access requests from this plethora of cores.

Some of the L3 cache is shaved off for lower-spec SKUs, i.e. 25MB is present on the i7-12700K and 20MB on the i5-12600K. That’s still far more than the equivalent Rocket Lake SKU.

While the amount of L3 Cache is slightly smaller than that available on a Ryzen Zen 3 CCD, we should remember that Intel don’t have to compensate for both memory and I/O controller being off-die. It’s therefore not serving to mitigate the performance impacts of these design requirements, and instead can reap all of the benefits but without the associated latency downsides.

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